DashyFox bf14b3d7ad fix(rx/tx): B5 pop-by-value, B6 ISR micros mask, B7 crc parens, B10 div guard, send length validation ...

B5 (MEDIUM): RingBuffer::pop(T&) копирует под одной критсекцией; tick() перешёл на неё → нет торн-рида (внутренний interrupts() в T* pop снимал внешнюю защиту до чтения *ptr). T* pop() оставлен (не используется).
B6 (MEDIUM): убрана лишняя noInterrupts/interrupts вокруг micros() в EXTI-ISR (снимала PRIMASK посреди ISR). std::function-диспетчеризация attachInterrupt — структурна, не трогаю.
B7 (LOW): скобки в crcCheck (== & 0xFF по приоритету).
B10 (LOW): guard деления на 0 в ceil_div (актуально только при freeFrec — НЕ включаю).
send: sendDataFULL — валидация полного packSize<=31 (было len>bytePerPack=31, packSize=7+len оборачивался → тихая потеря Data payload 25..31).
B8 (isSubBufferOverflow) — уже volatile, потеря флага безвредна (диагностика), не трогаю. B9 (prevRise==0 при micros()==0) — уже обработан веткой в preambleProcessEdge, намеренно.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

2026-07-01 13:38:51 +03:00

.vscode

fix longPacket sync_bit

2026-04-13 14:44:18 +03:00

Analyzer/raw

fix timer overflow?

2026-04-15 11:00:48 +03:00

ref

Add documentation for IR TX modes in the library

2026-04-20 14:49:38 +03:00

test_examples/longData

fix(ir-dma): volatile active + errorCount() observability; live poll() in longData example

2026-06-30 12:25:36 +03:00

tools

fix timer overflow?

2026-04-15 11:00:48 +03:00

.gitignore

Analyzer plug

2026-04-07 13:25:55 +03:00

IR_config.cpp

enable/disable fix

2025-01-16 17:51:21 +03:00

IR_config.h

upd

2026-04-20 17:47:33 +03:00

IR_Decoder.cpp

fix(rx): guard null encoder in auto-accept (B2), init accept fields (B4), fix dataBuffer OOB off-by-one (B3)

2026-07-01 10:34:12 +03:00

IR_Decoder.h

fix(rx): guard null encoder in auto-accept (B2), init accept fields (B4), fix dataBuffer OOB off-by-one (B3)

2026-07-01 10:34:12 +03:00

IR_DecoderRaw.cpp

fix(rx/tx): B5 pop-by-value, B6 ISR micros mask, B7 crc parens, B10 div guard, send length validation

2026-07-01 13:38:51 +03:00

IR_DecoderRaw.h

Refactor IR decoder and encoder for improved pulse filtering and ISR handling. Removed unused filtered sub-buffer, updated pulse filter methods, and added support for buffered ISR storage in the encoder. Enhanced documentation for clarity on DMA TX backend and ISR modes.

2026-04-20 14:48:45 +03:00

IR_DMA_ISR_signal_analysis.md

dma fix priority and debug

2026-04-02 17:25:10 +03:00

IR_Encoder.cpp

fix(rx/tx): B5 pop-by-value, B6 ISR micros mask, B7 crc parens, B10 div guard, send length validation

2026-07-01 13:38:51 +03:00

IR_Encoder.h

tx error tracking and inline glitch filter

2026-04-21 10:00:46 +03:00

ir_protocol_gate_runs_sim.py

fix msgTypeReceive and isReceive

2026-03-30 13:34:04 +03:00

IR-protocol.ino

add brightness controll

2026-04-17 09:45:32 +03:00

IrDmaTxStm32.h

fix(ir-dma): __DSB() barriers before DMA arm and after circular refill (#8)

2026-06-30 14:12:28 +03:00

IrTxBsrrWave.h

add brightness controll

2026-04-17 09:45:32 +03:00

IrTxGateTypes.h

tx error tracking and inline glitch filter

2026-04-21 10:00:46 +03:00

IrTxIsrBufferedStorage.h

Refactor IR decoder and encoder for improved pulse filtering and ISR handling. Removed unused filtered sub-buffer, updated pulse filter methods, and added support for buffered ISR storage in the encoder. Enhanced documentation for clarity on DMA TX backend and ISR modes.

2026-04-20 14:48:45 +03:00

PacketTypes.cpp

refactor

2024-04-23 13:35:49 +03:00

PacketTypes.h

dma fix priority and debug

2026-04-02 17:25:10 +03:00

RingBuffer.h

fix(rx/tx): B5 pop-by-value, B6 ISR micros mask, B7 crc parens, B10 div guard, send length validation

2026-07-01 13:38:51 +03:00

Description

No description provided

7.9 MiB

Languages

C++ 79.2%

Python 18.2%

CMake 1.6%

Batchfile 1%